The present invention relates to an adjusting circuit and method thereof, especially to a circuit and method thereof for adjusting dynamically frequency of the basic clock signal of the front-side bus when the central processing unit works.
Computer system is one of the most important technologies of last century. A lot of paperwork in companies is done by personnel manually and this is time-consuming and labor-intensive. Moreover, staffs of research and development department need to perform a lot experiments for designing new products. It takes a lot of time and labor to make the concepts or ideas feasible. Now due to the computers, administrative staffs do the paperwork easily and smoothly. The speed and efficiency are increased dramatically. Furthermore, the R&D staffs use computers to make simulations so as to speed up the development of new products. In addition, computers are also used to play music or movies for entertainment. It's not only a tool but also essentials of life. The invention of portable computers made people use computers more conveniently at any place, any time.
Although the portable computers are easy to carry, it gets problems on battery life. In order to extend the battery life, various designs are used to make the battery get optical efficiency. Moreover, central processing unit of the computer is one of the most power-consuming parts. Thus most of the methods for saving electricity depend on reducing the operation speed of the central processing unit so as to save electricity.
Refer to FIG. 1, a clock generator 10 of the computer includes a phase locked loop 12 that receives a fixed clock signal generated from a crystal oscillator 15 and produces a main clock signal according to a scale factor. The main clock signal is sent to a central processing unit 20 and a north bridge chip 30. This main clock signal is a basic clock signal of a front-side bus 33 between the central processing unit 20 and the north bridge chip 30 and its frequency is calculated by the following equation:f=f0*M/N  (1)f is frequency of the basic clock signal, f0 is frequency of the fixed clock signal generated by the crystal oscillator 15, M and N respectively are numerator and denominator of the scale factor.
A phase locked loop 36 of the north bridge chip 30 receives a basic clock signal output from the phase locked loop 12 to generate operation clock signal for the front-side bus 33 so that the north bridge chip 30 controls operation of the front-side bus 33. A phase locked loop 25 of the central processing unit 20 also receives the basic clock signal output from the phase locked loop 12 to generate operation clock signal for the central processing unit 20. Thus the central processing unit 20 works according to this operation clock signal. Therefore, the speed of the central processing unit 20 can be adjusted by modulating frequency of the basic clock signal generated by the phase locked loop 12 of the clock generator 10.
Most of the methods for adjusting the basic clock signal available now uses software to drive an embedded controller 40 of portable devices, through a system management bus 45 to change value of the register inside the clock generator 10. Thus numerator and denominator of a scale factor of the phase locked loop 12 are changed and the phase locked loop 12 is driven to adjust the basic clock signal, However, such kind of methods are quite complicated with poor adjustment efficiency. Moreover, such methods of using the system management bus 45 can't be used in combination with operating systems of the computer. Thus it is not compatible with the software that is installed in the operating system for detecting load of the central processing unit 20. Therefore, such way can't automatically adjust the basic clock signal of the front-side bus 33 according to load of the central processing unit 20 and can't save electricity effectively.
Therefore, the present invention provides a circuit for adjusting basic clock signal of front-side bus and method thereof that not only improve disadvantages of conventional adjustment methods but also increase electricity-saving efficiency. Moreover, it can be used in combination with software installed in operating systems to adjust frequency of the basic clock signal of the front-side bus automatically according to load of the central processing unit for saving power.